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static const UART_BAUD_CONTROL asBaudControl[2] =
{
// { 0x06, 0x00, 0x0C }, // 4800 baud using 32768 Hz clock
// { 0xD0, 0x00, 0x00 }, // 38400 baud using 8 MHz clock
// { 0xA0, 0x01, 0x00 }, // 19200 baud using 8 MHz clock
// { 0xA0, 0x00, 0x00 }, // 50000 baud using 8 MHz clock
// { 0x1B, 0x00, 0x04 }, // 1200 baud using 32768 Hz clock
// { 0x03, 0x00, 0x06 }, // 9600 baud using 32768 Hz clock
// { 0x0D, 0x00, 0x0A }, // 2400 baud using 32768 Hz clock
{ 0x0D, 0x00, 0x6B }, // 2400 baud using 32768 Hz clock
{ 0x8A, 0x00, 0x00 } // 57600 baud using 8 MHz clock
};
void Asynchronous_Init(UCHAR ucBaudRate_)
{
#if defined (PIN_RESET)
// Go int RESET
SYSTEM_RST_SEL &= ~SYSTEM_RST_BIT; // Set as output
SYSTEM_RST_DIR |= SYSTEM_RST_BIT; // Set as output
SYSTEM_RST_OUT &= ~SYSTEM_RST_BIT; // Set low to reset module
#endif
// Set configuration pin
ASYNC_RTS_SEL &= ~ASYNC_RTS_BIT; // Set as gpio
ASYNC_RTS_DIR &= ~ASYNC_RTS_BIT; // Set as input
ASYNC_SUSPEND_SEL &= ~ASYNC_SUSPEND_BIT; // Set as gpio
ASYNC_SUSPEND_DIR |= ASYNC_SUSPEND_BIT; // Set as output
ASYNC_SUSPEND_OUT |= ASYNC_SUSPEND_BIT; // Set high
ASYNC_SLEEP_SEL &= ~ASYNC_SLEEP_BIT; // Set as output
ASYNC_SLEEP_DIR |= ASYNC_SLEEP_BIT; // Set as output
ASYNC_SLEEP_OUT |= ASYNC_SLEEP_BIT; // Set high
UART_ASYNC_UCI_CTL0 = CHAR; // Configure UART no parity, LSB first, 8-bit, one stop bit
UTCTL0 |= SSEL0; // UCLK = ACLK
UART_ASYNC_UCI_BR0 = asBaudControl[ucBaudRate_].ucBR0; // Baud rate
UART_ASYNC_UCI_BR1 = asBaudControl[ucBaudRate_].ucBR1;
UART_ASYNC_UCI_MCTL = asBaudControl[ucBaudRate_].ucMCTL;
ASYNC_RX_SEL |= ASYNC_RX_BIT; // Enable pin as UART RX
ASYNC_RX_DIR &= ~ASYNC_RX_BIT; // Enable pin as input
ASYNC_TX_SEL |= ASYNC_TX_BIT; // Enable pin as UART TX
ASYNC_TX_DIR |= ASYNC_TX_BIT; // Enable pin as output
ME2 |= UTXE0 + URXE0; // Enabled USART0 TXD/RXD
UART_ASYNC_UCI_CTL0 &= ~SWRST; // Enable UART
UART_ASYNC_UCI_IFR &= ~UART_ASYNC_RX_INT; // Clear the RX interrupt
UART_ASYNC_UCI_IER |= UART_ASYNC_RX_INT; // Enable the RX interrupt
#if defined (PIN_RESET)
SYSTEM_RST_OUT |= SYSTEM_RST_BIT; // ** Take ANT out of RESET **
Timer_DelayTime(50000); // Delay for 500ms
#elif defined (SUSPEND_MODE_RESET)
ASYNC_SUSPEND_OUT |= ASYNC_SUSPEND_BIT; // Set high
Timer_DelayTime(25);
ASYNC_SLEEP_OUT &= ~ASYNC_SLEEP_BIT; // Set low to exit SUSPEND mode and finish the reset
while(IS_RTS_ASSERTED()); // Wait until ANT wakes up out of SUSPEND
ASYNC_SLEEP_OUT |= ASYNC_SLEEP_BIT; // Set high to allow ANT to sleep until we need it
while(!IS_RTS_ASSERTED()); // Wait until ANT goes to SLEEP
#endif
}
void Asynchronous_Transaction()
{
if(sqTxMessages.ucMessageCount > 0) // if we have a message to send
{
ASYNC_SLEEP_DEASSERT(); // keep ANT from sleeping
//Timer_DelayTime(5000);
//Wait until RTS drops
while(IS_RTS_ASSERTED());
UCHAR ucCheckSum = MESG_TX_SYNC;
UCHAR* pucTxBuffer;
UCHAR ucMesgLen;
UCHAR ucIndex;
pucTxBuffer = sqTxMessages.aucMessages[sqTxMessages.ucTail].aucBuffer;
Asynchronous_WriteByte(MESG_TX_SYNC);
ucMesgLen = pucTxBuffer[0] + MESG_SAVED_FRAME_SIZE; // read the message length of the message to send and adjust for frame size
ucIndex = 0;
do
{
Timer_DelayTime(10);
Asynchronous_WriteByte(pucTxBuffer[ucIndex]); // write out message byte
ucCheckSum ^= pucTxBuffer[ucIndex]; // update the checksum
} while (++ucIndex < ucMesgLen); // loop through message
Asynchronous_WriteByte(ucCheckSum); // write out the checksum byte
//Wait until RTS is high to signal that ANT has begun toggling RTS to show that it has begun processing the message
while(!IS_RTS_ASSERTED());
//Wait until RTS drops
while(IS_RTS_ASSERTED());
// Wait until tx flag is enabled.
while(!(UART_ASYNC_UCI_IFR & UART_ASYNC_TX_INT));
//Check if we can allow ANT to go to sleep after having sent this message
if(sqTxMessages.aucMessages[sqTxMessages.ucTail].bGoToSleep)
ASYNC_SLEEP_ASSERT(); // let ANT sleep
sqTxMessages.ucMessageCount--;
sqTxMessages.ucTail = (sqTxMessages.ucTail + 1) & (SERIAL_QUEUE_TX_SIZE-1); // Update queue
}
}
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